This invention relates to a manufacturing method of semiconductor chips by dicing individual semiconductor devices from a semiconductor wafer in which the semiconductor devices are formed.
The semiconductor chips mounted on boards in electronic devices or the like are manufactured by dicing semiconductor devices into individual pieces from a wafer state in which circuit patterns are formed. Accompanying the increase in difficulty to handle semiconductor devices in a wafer state due to downsizing in thickness of the semiconductor devices, there has been applied in recent years, a plasma dicing where dicing to divide a semiconductor wafer into individual semiconductor chips is conducted by plasma etching (see, for example, JP-A-2004-172364 Publication).
The plasma dicing is performed by conducting a plasma etching in a state that the semiconductor wafer is masked with masks of resist films other than street lines which shows dividing positions in grid patterns, so that the semiconductor wafer is cut along street lines. After dicing, in order to remove masks, a plasma ashing to remove the masks is conducted in the same plasma processing apparatus to conduct the plasma dicing in the conventional art of JP-A-2004-172364 Publication.
However, in the plasma ashing, reaction products generated in removing the masks are scattered into particles and accumulated inside of the plasma processing apparatus. Accordingly, in case that dicing process and ashing process are repeatedly executed in the same plasma processing apparatus, quality deterioration may be caused in a dicing process due to contamination of the semiconductor wafer with the particles accumulated in the plasma processing apparatus.